Modern digital VLSI circuits commonly operate at 2.5 volts or below. However, integrated circuits often have additional on chip circuits operating at higher voltages. Example circuits are input/output interface circuits with various off-chip system components such as power management switches, analog input circuits conditioning transducer signals, or output analog drive functions for speakers or other actuators.
One solution to this problem is to use multiple gate oxide thicknesses and to build both low voltage and high voltage transistors on the same chip. This method increases process complexity and cost. An alternative solution is to use lateral diffused metal-oxide-semiconductor (LDMOS) transistors that can operate with higher drain voltages with little or no additional process complexity and cost. In an LDMOS transistor a lightly doped lateral diffused drain region is constructed between the heavily doped drain contact and the transistor channel region. A depletion region forms in this lightly doped lateral diffused region resulting in a voltage drop between the drain contact and the transistor gate. With proper design, sufficient voltage may be dropped between the drain contact and the gate dielectric to allow a low gate voltage transistor to be used as a switch for the high voltage.
Some integrated circuit chips such as driver chips provide high current at high voltages. LDMOS transistors on these circuits may be very large to supply the high current requirements. The LDMOS power transistor may occupy 50% or more of the driver chip area to meet power requirements.